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I'm trying to find out how memory is arranged in dual channel mode, i.e. which memory addresses are on which DIMM. What I have currently found out is that there are two modes "ganged" and "unganged" and that there is little difference between them performance-wise.

With ganged mode I understood that each 128-bit word is split in a two 64 bit words, and those are combined when read / written using two channels at the same time. That would mean that for every 128 bits one would probably contain the lower 64 bits (/8 bytes) and the other the higher 64 bits. So byte addresses 0-7 are on one DIMM, and the next 8-15 are on the other. Is this correct?

What's entirely unclear to me is how memory is arranged in "unganged" mode. Is the memory still spread over the two modules using "sectors" of a specific size? Or is another scheme used?

Do these arrangements differ per processor or is this kind of operation standardized somewhere?

Maarten Bodewes
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  • unganged mode maintains two 64-bit memory buses but allows independent access to each channel, in support of multithreading with multi-core processors – DavidPostill Sep 09 '20 at 12:02
  • @DavidPostill Yes, I got that. But that doesn't explain how the memory is arranged. Independent access to each channel *containing what*? Will each thread or process get assigned a channel? If you have multiple threads processing the same program code then at least the instructions should reside in one channel in that case, right? – Maarten Bodewes Sep 09 '20 at 16:44

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